SMN Registers

Defines

#define SMN_STATUS   0x00001000
#define SMN_COMMAND   0x00001004
#define SMN_SEQUENCE_START   0x00001008
#define SMN_SEQUENCE_END   0x0000100C
#define SMN_SEQUENCE_CHECK   0x00001010
#define SMN_BIT_COUNT   0x00001014
#define SMN_BITBANK_INC_SIZE   0x00001018
#define SMN_BITBANK_DECREMENT   0x0000101C
#define SMN_COMPARE_SIZE   0x00001020
#define SMN_PLAINTEXT_CHECK   0x00001024
#define SMN_CIPHERTEXT_CHECK   0x00001028
#define SMN_TIMER_IV   0x0000102C
#define SMN_TIMER_CONTROL   0x00001030
#define SMN_DEBUG_DETECT_STAT   0x00001034
#define SMN_TIMER   0x00001038

Detailed Description

These values are offsets into the SCC for the Security Monitor (SMN) registers. They are used in the register_offset parameter of the scc_read_register() and scc_write_register().


Define Documentation

#define SMN_BIT_COUNT   0x00001014

Bit Bank Repository for AIC. See SMN_BIT_COUNT_MASK

Referenced by scc_write_register().

#define SMN_BITBANK_DECREMENT   0x0000101C

Bit Bank Decrement for AIC. See SMN_BITBANK_DECREMENT_MASK

Referenced by scc_read_register().

#define SMN_BITBANK_INC_SIZE   0x00001018

Bit Bank Increment Size for AIC. See SMN_BITBANK_INC_SIZE_MASK

#define SMN_CIPHERTEXT_CHECK   0x00001028

Ciphertext Check register for Plaintext/Ciphertext checker.

#define SMN_COMMAND   0x00001004
#define SMN_COMPARE_SIZE   0x00001020

Compare Size register for Plaintext/Ciphertext checker. See SMN_COMPARE_SIZE_MASK

#define SMN_DEBUG_DETECT_STAT   0x00001034

Debug Detector Status Register See SMN Debug Detector Status Registerfor definitions.

Referenced by check_register_accessible().

#define SMN_PLAINTEXT_CHECK   0x00001024

Plaintext Check register for Plaintext/Ciphertext checker.

#define SMN_SEQUENCE_CHECK   0x00001010

Sequence Check register for ASC. See SMN_SEQUENCE_END_MASK

Referenced by scc_update_state().

#define SMN_SEQUENCE_END   0x0000100C

Sequence End register for ASC. See SMN_SEQUENCE_CHECK_MASK

Referenced by scc_update_state().

#define SMN_SEQUENCE_START   0x00001008

Sequence Start register for ASC. See SMN_SEQUENCE_START_MASK

Referenced by scc_update_state().

#define SMN_STATUS   0x00001000

Status register for SMN. See SMN Status Register definitions for further information.

Referenced by check_register_accessible(), offset_within_smn(), and scc_update_state().

#define SMN_TIMER   0x00001038

Current value of the Timer Register

Referenced by offset_within_smn(), and scc_write_register().

#define SMN_TIMER_CONTROL   0x00001030

Timer Control register. See SMN Timer Control Register definitions.

#define SMN_TIMER_IV   0x0000102C

Timer Initial Value register

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