REGISTER_ST_DAC Struct Reference

This structure lists all fields of the ST_DAC hardware register. More...

Data Fields

REGFIELD STDCSSISEL
REGFIELD STDCCLKSEL
REGFIELD STDCSM
REGFIELD STDCBCLINV
REGFIELD STDCFSINV
REGFIELD STDCFS
REGFIELD STDCCLK
REGFIELD STDCFSDLYB
REGFIELD STDCEN
REGFIELD STDCCLKEN
REGFIELD STDCRESET
REGFIELD SPDIF
REGFIELD SR

Detailed Description

This structure lists all fields of the ST_DAC hardware register.


Field Documentation

Stereo DAC SSI SPDIF mode. Mode no longer available.

Stereo DAC sample rate - 4 bits

Stereo DAC bitclock inversion

Stereo DAC clock setting - 3 bits

Stereo DAC clocking enable

Stereo DAC clock input select

Stereo DAC enable

Bus protocol selection - 2 bits

Stereo DAC framesync delay bar

Stereo DAC framesync inversion

Stereo DAC filter reset

Stereo DAC slave / master select

Stereo DAC SSI bus select

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